JASON TEMPORADO
Computer Science Student @ University of the Philippines Diliman
Building from the ground up—from raw silicon logic circuits to optimized algorithms and manual memory allocators. Operating close to the metal.
$ whoami
Jason Temporado - UP Diliman CS Student. Low-level developer.
$ cat skills.json
{
"languages": ["C", "Python", "Assembly"],
"focus": ["custom_heap_allocator", "digital_logic", "micro_optimizations"]
}
$ ./run_logic_simulator.sh
Initializing interactive logic gate visualizer...
ABOUT & PHILOSOPHY
"Writing code without bloated abstractions."
Modern software is buried under layers of unnecessary dependencies and massive, bloated abstractions. I believe in understanding the stack all the way down.
My passion is in understanding exactly how software interacts with hardware. Whether it is minimizing memory footprint in custom manual heap allocators, optimizing CPU cache locality, or modeling logic circuitry, I strive to write highly performant, bare-metal-conscious C and Python.
Deep technical competence requires rigorous, searchable documentation. I manage my knowledge base in a highly structured Obsidian vault, linking everything from computer hardware architectures to algorithmic complexity analysis.
-
📁 Systems & Theory
- 📄 cache-locality.md
- 📄 heap-allocator.md
- 📄 kmap-minimization.md
-
📁 Languages
- 📄 pointer-arithmetic.md
- 📄 inline-assembly.md
Cache Locality & CPU Cache Lines
Modern CPUs retrieve memory in blocks of 64 bytes (Cache Lines). Accessing contiguous memory (spatial locality) is up to 100x faster than jumping around the heap due to Cache Misses.
for(int i=0; i<N; i++)
for(int j=0; j<M; j++)
sum += matrix[i][j];
CORE COMPETENCIES
$ gcc -O3 -Wall main.c -o build/opt_system
main.c: optimized memory layouts compiled.
Size of build/opt_system: 14.2 KB
Status: [OK] EXECUTION TIME: 0.12ms
Simulate heap allocation algorithms. Custom headers tracking block size and usage.
Toggle cells between 0 & 1 to view logic minimization in real time.
- ⚙️ Digital Logic Design: Boolean algebra, sequential/combinational circuits, Gray codes, K-maps.
- 🧠 Data Structures: Strict, optimized low-level graphs, dynamic arrays, BSTs, custom queues.
- 💾 Manual Memory Management: Free-list allocators, memory alignment, pointer arithmetic.
SELECTED PROJECTS
LOW-LEVEL SYSTEMS & CUSTOM ALLOCATORS
Optimized C and Python implementations of foundational algorithms and data structures built entirely from scratch without external libraries. Focused on micro-optimization, cache-friendly memory block layouts, and strict memory constraint compliance.
DIGITAL LOGIC & ARCHITECTURE SIMULATION
Practical logic simulators modeling complex Boolean functions, multiplexers, demultiplexers, registers, and sequential circuit state transitions. Features integrated Gray-code mapping and Karnaugh map simplification code.
UP DILIMAN CS WEEK MERCH GAME MECHANICS
Game logic, complexity analysis, and mathematical rule validation for community-driven board game projects for the UP Diliman CS Week merchandise. Focused on algorithmic fairness, rules condensation, and state space complexity calculations.
CONTACT & TRANSMISSIONS
SYSTEM CHANNELS
// system status
ping: 4ms to Diliman Net
active keys: SHA-256
uptime: 100%